11/2/2023 0 Comments Matlab hdl coder examplesIn demodulation mode, this signal also validates NCellID, sssCorrelation, and sssThreshold. ![]() In search mode, this signal validates pssNCellID2, pssTimingOffset, pssFrequencyOffset, pssCorrelation, and pssThreshold for each PSS that is detected. This value is returned only in demodulation mode. SssThreshold: 32-bit unsigned value that is the SSS threshold. This signal is returned only in demodulation mode. SssCorrelation: 32-bit unsigned value that is the SSS correlation strength. NCellID: 10-bit unsigned value that is the cell ID of the demodulated SSB. PssThreshold: 32-bit unsigned value that is the threshold value when PSS was detected. PssCorrelation: 32-bit unsigned value that is the strength of the PSS correlation. This signal has the same units as the frequencyOffset input. PssFrequencyOffset: 32-bit signed value that is the frequency offset of the detected SSB. The timing offset is in samples at 61.44 Msp from 0 to 1228799. ![]() PssTimingOffset: 21-bit unsigned value that is the timing offset of the detected SSB. PssNCellID2: 2-bit unsigned value that is the PSS (0, 1 or 2) of the detected SSB. See the next section for the possible values of this signal. Status: 4-bit unsigned value that indicates the progress of the current operation. The new operation begins when start is returned to 0 ( false). If an operation is already in progress, that operation is canceled when start is set to 1 ( true). To start an operation, set frequencyOffset, subcarrierSpacing, mode, timingOffset, and NCellID2 to the desired values and set start to 1 ( true) for one or more cycles. Start: 1-bit control signal used to start a search or demodulation operation. StopDemod: 1-bit control signal that stops the repeat demodulation mode operation when asserted. When the SSB detector fails to detect timeOut + 1 SSBs in a row it terminates. TimeOut: 3-bit unsigned value specifying the time out count for repeat demodulation mode. This parameter applies only for demodulation mode. NCellID2: 2-bit unsigned value specifying the PSS (0, 1, or 2) of the SSB to be demodulated. Specify the timing offset in samples at 61.44 Msps, from 0 to 1228799. TimingOffset: 21-bit unsigned value specifying the timing offset of the start of the SSB to be demodulated. Set this signal to 0 for search mode, 1 for single demodulation mode and 2 for repeat demodulation mode. Mode: 2-bit unsigned value specifying the operation mode. Set this signal to 0 to select 15kHz, or 1 to select 30kHz. SubcarrierSpacing: 2-bit unsigned value specifying the subcarrier spacing. Use this equation to convert the value to Hz: frequencyOffset_Hz = frequencyOffset * 61.44e6 / 2^32. This signal is connected to an NCO with a 32-bit accumulator. ![]() ValidIn: 1-bit control signal to validate dataIn.įrequencyOffset: 32-bit signed value specifying the frequency offset to be corrected. In demodulation mode, the detector recovers a specified SSB OFDM-demodulates its resource grid and searches for SSS within the appropriate resource elements.ĭataIn: 14-bit signed complex-valued signal, sampled at 61.44 Msps. In search mode, the detector searches for SSBs and returns their parameters. The SSB detector has two modes of operation, search and demodulation, which are demonstrated in this example. It also includes a digital down converter (DDC) for correcting frequency offsets in the received signal. The SSB detector performs primary synchronization sequence (PSS) search, orthogonal frequency division multiplexing (OFDM) demodulation, and secondary synchronization sequence (SSS) search. A controller must be used co-ordinate the overall cell search as shown in the 5G NR MIB Recovery Using Analog Devices AD9361/AD9364 (Communications Toolbox Support Package for Xilinx Zynq-Based Radio) example. It is designed to be used as part of a larger system that implements carrier frequency offset recovery and subcarrier spacing detection. The SSB detector searches for SSBs in time at a given frequency offset and subcarrier spacing. The detector performs all of the high-speed signal processing tasks associated with the cell search algorithm therefore is well suited for FPGA or ASIC implementation. This example is one of a related set, for more information see NR HDL Reference Applications Overview.Ī block diagram of the SSB detector is shown in the figure. The Simulink® model described in this example is an HDL-optimized implementation of a synchronization signal block (SSB) detector for 5G NR frequency range 1 (FR1).
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